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1. general description the hef4052b-q100 is a dual 4-channel analog multiplexer/demultiplexer with common channel select logic. each mu ltiplexer/demultiplexer has four independent inputs/outputs (ny0 to ny3) and a common input/output (nz). the common channel select logic includes two select inputs (s1 and s2) and an active low enable input (e ). both multiplexers/demultiplexers contain four bidi rectional analog switches, each with one side connected to an independent input/output (ny0 to ny3) and the other side connected to a common input/output (nz). with e low, one of the four switches is selected (low-impedance on-state) by s1 and s2. with e high, all switches are in the high-impedance off-state, independent of s1 and s2. if break before make is needed, then it is necessary to use the enable input. v dd and v ss are the supply voltage connections for the digital control inputs (s1 and s2, and e ). the v dd to v ss range is 3 v to 15 v. the analog inputs/outputs (ny0 to ny3, and nz) can swing between v dd as a positive limit and v ee as a negative limit. v dd ? v ee may not exceed 15 v. unused inputs must be connected to v dd , v ss , or another input. for operation as a digital multiplexer/demultiplexer, v ee is connected to v ss (typically ground). v ee and v ss are the supply voltage connections for the switches. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? fully static operation ? 5 v, 10 v, and 15 v parametric ratings ? standardized symmetrical output characteristics ? esd protection: ? mil-std-833, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? complies with jedec standard jesd 13-b 3. applications ? analog multiplexing and demultiplexing ? digital multiplexing and demultiplexing ? signal gating hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer rev. 1 ? 12 july 2012 product data sheet
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 2 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 4. ordering information 5. functional diagram table 1. ordering information all types operate from ? 40 ? c to +125 ? c. type number package name description version hef4052bt-q100 so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 HEF4052BTT-Q100 tssop16 plastic thin shrink small ou tline package; 16 leads; body width 4.4 mm sot403-1 fig 1. functional diagram mnb042 1 - of - 4 decoder logic level conversion 7 8 v ee v ss v dd 12 13 16 3 14 15 11 10 9 6 s1 s2 e 1 5 2 1y0 1z 2z 1y1 1y2 1y3 2y0 2y1 2y2 2y3 4 fig 2. schematic diagram (one switch) 001aak604 nyn nz v ee v dd v dd
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 3 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer fig 3. logic symbol fig 4. iec logic symbol 001aak605 4 2 5 1 11 15 14 12 13 3 6 9 1z s1 s2 e 2z 2y3 2y2 2y1 2y0 1y3 1y2 1y1 1y0 10 mnb041 11 15 14 12 4 2 5 9 1 10 0 6 g4 mdx 0 3 4 1 3 2 1 0 13 3
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 4 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer fig 5. logic diagram 001aak634 level converter level converter level converter s1 s2 e 1y0 1y1 1y2 1y3 2y0 2y1 2y2 2y3 2z 1z
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 5 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 6. pinning information 6.1 pinning 6.2 pin description fig 6. pin configuration sot109-1 f ig 7. pin configuration sot403-1 aaa-003545 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 hef4052b-q100 2y0 vdd 2y2 1y2 2z 1y1 2y3 1z 2y1 1y0 e 1y3 vee s1 vss s2 hef4052b-q100 2y0 vdd 2y2 1y2 2z 1y1 2y3 1z 2y1 1y0 e 1y3 vee s1 vss s2 aaa-003546 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 2. pin description symbol pin description e 6 enable input (active low) v ee 7 supply voltage v ss 8 ground supply voltage s1, s2 10, 9 select input 1y0, 1y1, 1y2, 1y3, 2y0, 2y1, 2y2, 2y3 12, 14, 15, 11, 1, 5, 2, 4 independent input or output 1z, 2z 13, 3 common output or input v dd 16 supply voltage
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 6 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 7. functional description 7.1 function table [1] h = high voltage level; l = low voltage level; x = don?t care. 8. limiting values [1] to avoid drawing v dd current out of terminal z, when switch current flows in to terminals y, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current flows into terminal z, no v dd current will flow out of terminals y, and in this case there is no limit for the voltage drop across the switch, but the voltages at y and z may not exceed v dd or v ee . for so16 package: p tot derates linearly wi th 8 mw/k above 70 ? c. for tssop16 package: p tot derates linearly with 5.5 mw/k above 60 ? c. table 3. function table [1] input channel on e s2 s1 lllny0 to nz l l h ny1 to nz lhlny2 to nz l hhny3 to nz h x x switches off table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to v ss = 0 v (ground). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +18 v v ee supply voltage referenced to v dd [1] ? 18 +0.5 v i ik input clamping current pins sn and e ; v i < ? 0.5 v or v i >v dd + 0.5 v - ? 10 ma v i input voltage ? 0.5 v dd + 0.5 v i i/o input/output current - ? 10 ma i dd supply current - 50 ma t stg storage temperature ? 65 +150 ?c t amb ambient temperature ? 40 +125 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c so16 and tssop16 package [1] - 500 mw p power dissipation per output - 100 mw
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 7 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 9. recommended operating conditions 10. static characteristics table 5. recommended operating conditions symbol parameter conditions min typ max unit v dd supply voltage see figure 8 3- 15v v i input voltage 0 - v dd v t amb ambient temperature in free air ? 40 - +125 ?c ? t/ ? v input transition rise and fall rate v dd = 5 v - - 3.75 ? s/v v dd = 10 v - - 0.5 ? s/v v dd = 15 v - - 0.08 ? s/v fig 8. operating area as a function of the supply voltages v dd ? v ee (v) 015 510 001aac285 10 5 15 v dd ? v ss (v) 0 operating area table 6. static characteristics v ss = v ee = 0 v; v i = v ss or v dd unless otherwise specified. symbol parameter conditions v dd t amb = ? 40 ?c t amb = 25 ?c t amb = 85 ?c t amb = 125 ?c unit min max min max min max min max v ih high-level input voltage ?i o ? < 1 ? a 5 v 3.5 - 3.5 - 3.5 - 3.5 - v 10 v 7.0 - 7.0 - 7.0 - 7.0 - v 15 v 11.0 - 11.0 - 11.0 - 11.0 - v v il low-level input voltage ?i o ? < 1 ? a 5 v - 1.5 - 1.5 - 1.5 - 1.5 v 10 v - 3.0 - 3.0 - 3.0 - 3.0 v 15 v - 4.0 - 4.0 - 4.0 - 4.0 v i i input leakage current 15 v - ? 0.1 - ? 0.1 - ? 1.0 - ? 1.0 ? a
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 8 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 10.1 test circuits i s(off) off-state leakage current z port; all channels off; see figure 9 15 v - - - 1000 - - - - na y port; per channel; see figure 10 15 v - - - 200 - - - - na i dd supply current i o = 0 a 5 v - 5 - 5 - 150 - 150 ? a 10 v - 10 - 10 - 300 - 300 ? a 15 v - 20 - 20 - 600 - 600 ? a c i input capacitance sn, e inputs - - - - 7.5 - - - - pf table 6. static characteristics ?continued v ss = v ee = 0 v; v i = v ss or v dd unless otherwise specified. symbol parameter conditions v dd t amb = ? 40 ?c t amb = 25 ?c t amb = 85 ?c t amb = 125 ?c unit min max min max min max min max fig 9. test circuit for measuring off-state leakage current z port i s 001aak635 v dd v i v ss = v ee s1 and s2 e nz v dd or v ss v dd nyn v o fig 10. test circuit for measuring off-state leakage current nyn port i s 001aak636 v ss v o switch v ss = v ee s1 and s2 e nz ny0 v dd or v ss v dd nyn 1 2 v i
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 9 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 10.2 on resistance 10.2.1 on resistance waveform and test circuit table 7. on resistance t amb = 25 ? c; i sw =200 ? a; v ss = v ee = 0 v. symbol parameter conditions v dd ? v ee typ max unit r on(peak) on resistance (peak) v i = 0 v to v dd ? v ee ; see figure 11 and figure 12 5 v 350 2500 ? 10 v 80 245 ? 15 v 60 175 ? r on(rail) on resistance (rail) v i = 0 v; see figure 11 and figure 12 5 v 115 340 ? 10 v 50 160 ? 15 v 40 115 ? v i = v dd ? v ee ; see figure 11 and figure 12 5 v 120 365 ? 10 v 65 200 ? 15 v 50 155 ? ? r on on resistance mismatch between channels v i = 0 v to v dd ? v ee ; see figure 11 5 v 25 - ? 10 v 10 - ? 15 v 5 - ? r on =v sw /i sw . fig 11. test circuit for measuring r on v 001aak637 v ss v i v sw i sw v ss = v ee s1 and s2 e nz v dd or v ss v dd nyn
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 10 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 11. dynamic characteristics fig 12. typical r on as a function of input voltage v i (v) 015 510 001aae648 200 300 100 400 r on () 0 v dd = 5 v 10 v 15 v table 8. dynamic characteristics t amb = 25 ? c; v ss = v ee = 0 v; for test circuit see figure 16 . symbol parameter conditions v dd typ max unit t phl high to low propagation delay nyn, nz to nz, nyn; see figure 13 5 v 1020ns 10 v 5 10 ns 15 v 5 10 ns sn to nyn, nz; see figure 14 5 v 150 305 ns 10 v 65 135 ns 15 v 50 100 ns t plh low to high propagation delay yn, nz to nz, nyn; see figure 13 5 v 1020ns 10 v 5 10 ns 15 v 5 10 ns sn to nyn, nz; see figure 14 5 v 150 300 ns 10 v 75 150 ns 15 v 50 100 ns t phz high to off-state propagation delay e to nyn, nz; see figure 15 5 v 95 190 ns 10 v 90 180 ns 15 v 85 180 ns t pzh off-state to high propagation delay e to nyn, nz; see figure 15 5 v 130 260 ns 10 v 55 115 ns 15 v 4585ns t plz low to off-state propagation delay e to nyn, nz; see figure 15 5 v 100 205 ns 10 v 90 180 ns 15 v 90 180 ns
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 11 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 11.1 waveforms and test circuit t pzl off-state to low propagation delay e to nyn, nz; see figure 15 5 v 120 240 ns 10 v 50 100 ns 15 v 3575ns table 8. dynamic characteristics ?continued t amb = 25 ? c; v ss = v ee = 0 v; for test circuit see figure 16 . symbol parameter conditions v dd typ max unit measurement points are given in table 9 . measurement points are given in table 9 . fig 13. nyn, nz to nz, nyn propagation delays fig 14. sn to nyn, nz propagation delays 001aac290 nyn or nz input nz or nyn output t plh t phl v dd v ee v m v m v o v ee 001aac291 switch on t plh t phl switch off v dd v ss v o v ee nyn or nz output sn input switch off 10 % 90 % v m measurement points are given in table 9 . fig 15. enable and disable times 001aac292 t plz t phz switch off switch on switch on nyn or nz output low-to-off off-to-low nyn or nz output high-to-off off-to-high e input v o v o v ee v ee v dd v ss v m t pzl t pzh 90 % 90 % 10 % 10 % table 9. measurement points supply voltage input output v dd v m v m 5 v to 15 v 0.5v dd 0.5v dd
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 12 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer [1] for nyn to nz propagation delays use v ee . for sn to nyn or nz propagation delays use v dd . test data is given in table 10 . definitions: dut = device under test. r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including test jig and probe. r l = load resistance. fig 16. test circuit for measuring switching times 001aaj903 v i v o r t c l r l s1 dut pulse generator t w v m v i v i v dd v dd v ss v ee open 0 v negative pulse v i 0 v positive pulse 10 % 90 % 90 % 10 % v m v m v m t w t f t f t r t r table 10. test data input load s1 position nyn, nz sn and e t r , t f v m c l r l t phl [1] t plh t pzh , t phz t pzl , t plz other v dd or v ee v dd or v ss ? 20 ns 0.5v dd 50 pf 10 k ? v dd or v ee v ee v ee v dd v ee
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 13 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 11.2 additional dynamic parameters [1] f i is biased at 0.5 v dd ; v i =0.5v dd (p-p). 11.2.1 test circuits table 11. additional dynamic characteristics v ss = v ee = 0 v; t amb = 25 ? c. symbol parameter conditions v dd typ max unit thd total harmonic distortion see figure 17 ; r l =10k ? ; c l =15pf; channel on; v i =0.5v dd (p-p); f i =1khz 5 v [1] 0.25 - % 10 v [1] 0.04 - % 15 v [1] 0.04 - % f ( ? 3db) ? 3 db frequency response see figure 18 ; r l = 1 k ? ; c l = 5 pf; channel on; v i =0.5v dd (p-p) 5 v [1] 13 - mhz 10 v [1] 40 - mhz 15 v [1] 70 - mhz ? iso isolation (off-state) see figure 19 ; f i = 1 mhz; r l = 1 k ? ; c l = 5 pf; channel off; v i =0.5v dd (p-p) 10 v [1] ? 50 - db v ct crosstalk voltage digital inputs to switch; see figure 20 ; r l = 10 k ? ; c l =15pf; e or sn = v dd (square-wave) 10 v 50 - mv xtalk crosstalk between switches; see figure 21 ; f i = 1 mhz; r l =1 k ? ; v i =0.5v dd (p-p) 10 v [1] ? 50 - db table 12. dynamic power dissipation p d p d can be calculated from the formulas shown; v ee = v ss =0 v; t r = t f ? 20 ns; t amb = 25 ? c. symbol parameter v dd typical formula for p d ( ? w) where: p d dynamic power dissipation 5v p d = 1300 ? f i + ? (f o ? c l ) ? v dd 2 f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v dd = supply voltage in v; ? (c l ? f o ) = sum of the outputs. 10 v p d = 6100 ? f i + ? (f o ? c l ) ? v dd 2 15 v p d = 15600 ? f i + ? (f o ? c l ) ? v dd 2 fig 17. test circuit for measuring total harmonic distortion fig 18. test circuit for measuring frequency response d 001aak638 v ss f i r l c l v ss = v ee s1 and s2 e nz v dd or v ss v dd nyn db 001aak639 v ss f i r l c l v ss = v ee s1 and s2 e nz v dd or v ss v dd nyn
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 14 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer fig 19. test circuit for measuring isolation (off-state) db 001aak657 v ss f i r l c l switch v ss = v ee s1 and s2 e nz ny0 v dd or v ss v dd nyn 1 2 a. test circuit b. input and output pulse definitions fig 20. test circuit for measuring crosstalk voltage between digital inputs and switch 001aak658 v dd or v ss 0.5v dd switch v ss = v ee s1 and s2 e nz ny0 v dd nyn 1 2 g v r l r l c l v o 001aaj908 on v o v ct off off logic input (sn, e)
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 15 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer a. switch closed condition b. switch open condition fig 21. test circuit for measuri ng crosstalk between switches 001aak659 v ss v o r l r l v ss = v ee s1 and s2 e nz ny0 v dd or v ss v dd nyn v i 001aak660 v ss v i r l r l v ss = v ee s1 and s2 e nz ny0 v dd or v ss v dd nyn v o
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 16 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 12. package outline fig 22. package outline sot109-1 (so16) x w m a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 17 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer fig 23. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 18 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 13. abbreviations 14. revision history table 13. abbreviations acronym description hbm human body model esd electrostatic discharge mm machine model mil military table 14. revision history document id release date data sheet status change notice supersedes hef4052b_q100_1 20120712 product data sheet - -
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 19 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qualified for use in automotive applications. unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
hef4052b_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 1 ? 12 july 2012 20 of 21 nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors hef4052b-q100 dual 4-channel analog multiplexer/demultiplexer ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 12 july 2012 document identifier: hef4052b_q100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 functional description . . . . . . . . . . . . . . . . . . . 6 7.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 9 recommended operating conditions. . . . . . . . 7 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 9 10.2.1 on resistance waveform and test circuit. . . . . . 9 11 dynamic characteristics . . . . . . . . . . . . . . . . . 10 11.1 waveforms and test circuit . . . . . . . . . . . . . . . 11 11.2 additional dynamic parameters . . . . . . . . . . . 13 11.2.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 19 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 16 contact information. . . . . . . . . . . . . . . . . . . . . 20 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

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